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DDS-PLL SYNTHESISER
DPL-2.5G

In case the accurate 10MHz clock is available externally, the frequency
stability can be imprved.

FEATURES

Wide band (700MHz-2.5GHz), High resolution(10Hz)
Frequency stored in non-volatile memory
compact
1/2, 1/4 frequency output with optional divider
Low phase noise
High frequency stability. The internal clock is compensated by the micro controller
Low spurious
Reasonable price

SPECIFICATION

Power Supply	+5V ±5% 200mA +24V ±10% 100mA
Frequency range	700MHz-2500MHz
Output Level	0 dBm ± 3dB
Output impedance	50ohm
Frequency resolution	10Hz
Spurious	less than -60dB (except harmonic)
Phase noise	700-1.4GHz -80dBc/Hz at 20KHz OFFSET -105dBc/Hz at 100KHz OFFSET 1.4GHz-2.5GHZ -70dBc/Hz at 20KHz OFFSET -95dBc/Hz at 100KHz OFFSET
Internal clock frequency stability Internal clock frequency stability with time Frequency accuracy	± 2.5ppm(-10C- +50C) ±3ppm per year ±2.5ppm @25C(adjustable)
External reference input	10MHz 0.5-5Vp-p
Non-Voltile memory save times	more than 10,000
Frequency Control	RS-232C async serial input , 9pin D-SUB 9600BPS, 8 bit without parity 1 stop bit
Dimensions	104x67x29mm

Option01 1/2 divider 350-1250MHz output
Option02 1/4 divider 175-625MHz output

Refer to the User's Manual

OPTION Frequency setting board FIX-2.5G

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